Power Working Group

Mission

Create power measurement techniques for various MLPerf™ benchmarks that enable reporting and comparing energy consumption, performance and power of benchmarks run on the submission systems.

Purpose

Power consumption and energy efficiency are critical challenges for deploying and operating machine learning systems across the spectrum, from battery-powered smartphones to the world’s largest data centers. The MLPerf Power WG will create tools to measure power for machine learning systems to evaluate efficiency and guide system optimization and design trade-offs.

Deliverables

1. Power measurement techniques built on industry-standard tools
2. List of approved power analyzers
3. Power result metrics and format
4. Initial deliverable is integration with MLPerf Inference v1.0 for wall-powered systems
5. Roadmap for battery-powered system and MLPerf Training

Meeting Schedule

Weekly on Tuesday from 3:05-4:00PM Pacific.

How to Join and Access Working Group Resources

This group is limited to exclusively Members and Affiliates. If you are not already a Member/Affiliate or part of a Member/Affiliate company, you can learn more about Membership here.

• To sign up for the group mailing list, receive the meeting invite, and access shared documents and meeting minutes:
  1. Associate a Google account with your organizational email address.
  2. Request to join the Power Google Group. Requests are manually reviewed, so please be patient.
  3. Once your request to join the Power Google Group is approved, you'll be able to access the Power folder in the Members Google Drive.
• To engage in group dicussions:
  1. Join the group's channels on the MLCommons Discord server.
• To access the GitHub repository (public):
  1. If you want to contribute code, please sign our CLA first.
  2. Visit the GitHub repository.

Working Group Chairs

To contact all Power working group chairs email power-chairs@mlcommons.org.

Arun Tejus Raghunath Rajan (tejus@mlcommons.org) - LinkedIn

Tejus is a Technical Lead at Intel influencing Intel Products and IPs in the AI and HPC space. He has been at Intel since Summer 2011 and has experience in power modeling, post silicon power analysis and setting requirements for future Intel products. He has had experience in the Small Form Factor and wearables segments as well during this time. He has also served as the President of an Intel Employee Resource Groups helping drive mentorship and D&I efforts within the company. Prior to Intel, he was a Product Engineer at a university startup. Tejus has done his Master’s from the University of Utah in Salt Lake City and Bachelor’s from SRM University in India. Outside of work, he continues his passion for numbers and modeling by participating in soccer fantasy leagues and is an avid soccer fan.
Sachin Idgunji (sidgunji@mlcommons.org) - LinkedIn

Sachin is a Distinguished Engineer in the DL Compute Architecture team at NVIDIA and works on GPU performance analysis and energy efficient compute. He has been with NVIDIA since 2012.